Typed Connector Families

1/13/2016

By José Proença, HASLab/INESC TEC and University of Minho.

AbstractTyped models of connector/component composition specify interfaces describing ports of components and connectors. Typing ensures that these ports are plugged together appropriately, so that data can flow out of each output port and into an input port. These interfaces typically consider the direction of data flow and the type of values flowing. Components, connectors, and systems are often parameterised in such a way that the parameters affect the interfaces. Typing such connector families is challenging. This work takes a first step towards addressing this problem by presenting a calculus of connector families with integer and boolean parameters. The calculus is based on monoidal categories, with a dependent type system that describes the parameterised interfaces of these connectors. As an example, we demonstrate how to define n-ary Reo connectors in the calculus. The paper focusses on the structure of connectors – well-connectedness – and less on their behaviour, making it easily applicable to a wide range of coordination and component-based models. A type-checking algorithm based on constraints is used to analyse connector families, supported by a proof-of-concept implementation.

Keywords. Software engineering, coordination, component-based systems, variability.

About the speakerJosé Proença is currently a postdoc at HASLab/INESC TEC and University of Minho, working with Prof. Luís Barbosa. José holds a masters degree in Mathematics and Computer Science from University of Minho and a PhD from Leiden University, Amsterdam, working on CWI within the group of Foundations of Software Engineering. Before joining HASLab, José was affiliated with Distrinet, KU Leuven, working mainly with Danny Hughes and Dave Clarke, and he spent some time at Bristol University, UK. José works mainly on coordination of distributed components, often associated to the Reo coordination language, and on formal approaches to software product line engineering. More recently he has been working on binding and component models for embedded devices in the context of the LooCI middleware and micro PnP. José has many publications in his research area, and he serves as PC member and reviewer for several journals and conferences, which he co-chaired some of them.

LOCATION AND TIME

Address:  University of Minho, Gualtar campus, Braga, Portugal.

Building. Departamento de Informatica, Building 07.

Coffee session: at 1:30PM-2PM, Sala de Estar, 4th floor.

Talks session: at 2PM-2:45PM, Auditório 2, first floor.