Verification conditions for single-assignment programs

Citation:
Cruz D, Frade MJ, Pinto JS.  2012.  Verification conditions for single-assignment programs. Proceedings of the 27th Annual Symposium on Applied Computing - SAC. :1264–1270.

Tertiary Title:

SAC '12

Date Presented:

March

Abstract:

This paper is a systematic study of verification conditions and their use in the context of program verification. We take Hoare logic as a starting point and study in detail how a verification conditions generator can be obtained from it. The notion of program annotation is essential in this process. Weakest preconditions and the use of updates are also studied as alternative approaches to verification conditions. Our study is carried on in the context of a While language. Important extensions to this language are considered toward the end of the paper. We also briefly survey modern program verification tools and their approaches to the generation of verification conditions.

Website

Citation Key:

daCruz:2012:VCS:2245276.2231977

DOI:

10.1145/2245276.2231977

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