@conference {gupta2011probabilistic,
	title = {Probabilistic Error Propagation Modeling in Logic Circuits},
	booktitle = {IEEE Fourth International Conference on Software Testing, Verification and Validation Workshops - ICSTW},
	year = {2011},
	month = {March},
	pages = {617{\textendash}623},
	publisher = {IEEE},
	organization = {IEEE},
	address = {Berlin, Germany.},
	abstract = {<p>Recent study has shown that accurate knowledge of the false negative rate (FNR) of tests can significantly improve the diagnostic accuracy of spectrum-based fault localization. To understand the principles behind FNR modeling in this paper we study three error propagation probability (EPP) modeling approaches applied to a number of logic circuits from the 74XXX/ISCAS-85 benchmark suite. Monte Carlo simulations for random injected faults show that a deterministic approach that models gate behavior provides high accuracy (O(1\%)), while probabilistic approaches that abstract from gate modeling generate higher prediction errors (O(10\%)), which increase with the number of injected faults.</p>
},
	attachments = {https://haslab.uminho.pt/sites/default/files/ruimaranhao/files/tebug2011_submission_6.pdf},
	author = {Gupta, Shekhar and Van Gemund, Arjan JC and Rui Abreu}
}